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STD95NH02L-1 STD95NH02L N-channel 24V - 0.0039 - 80A - DPAK - IPAK Ultra low gate charge STripFETTM Power MOSFET Features Type STD95NH02L STD95NH02L-1 VDSS 24V 24V RDS(on) < 0.005 < 0.005 ID 80A(1) 80A(1) 3 2 1 1. Value limited by wire bonding 3 1 Conduction losses reduced Switching losses reduced Low threshold device IPAK DPAK Description The device is based on the latest generation of ST's proprietary STripFETTM technology. An innovative layout enables the device to also exhibit extremely low gate charge for the most demanding requirements in high-frequency DCDC converters. It's therefore ideal for high-density converters in Telecom and Computer applications. Figure 1. Internal schematic diagram Application Switching applications Table 1. Device summary Marking D95NH02L D95NH02L Package DPAK IPAK Packaging Tape & reel Tube Order code STD95NH02LT4 STD95NH02L-1 August 2007 Rev 4 1/16 www.st.com 16 Contents STD95NH02L - STD95NH02L-1 Contents 1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................. 6 3 4 5 6 7 Test circuit ................................................ 8 Appendix A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Packing mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2/16 STD95NH02L - STD95NH02L-1 Electrical ratings 1 Electrical ratings Table 2. Symbol Vspike (1) VDS VDGR VGS ID (2) Absolute maximum ratings Parameter Drain-source voltage rating Drain-source voltage (VGS = 0) Drain-gate voltage (RGS = 20k) Gate-source voltage Drain current (continuous) at TC = 25C Drain current (continuous) at TC = 100C Drain current (pulsed) Total dissipation at TC = 25C Derating factor Value 30 24 24 20 80 68 320 100 0.67 600 -55 to 175 Unit V V V V A A A W W/C mJ C ID(2) IDM (3) PTOT (4) EAS Single pulse avalanche energy Operating junction temperature Storage temperature Tj Tstg 1. Guaranteed when external Rg= 4.7 and Tf < Tfmax 2. Value limited by wire bonding 3. Pulse width limited by safe operating area 4. Starting Tj =25C, Id = 40A, Vdd = 22V Table 3. Rthj-case Rthj-amb TJ Thermal data Thermal resistance junction-case max Thermal resistance junction-to ambient max Maximum lead temperature for soldering purpose 1.5 100 275 C/W C/W C 3/16 Electrical characteristics STD95NH02L - STD95NH02L-1 2 Electrical characteristics (TCASE=25C unless otherwise specified) Table 4. Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) On/off states Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Gate-body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance Test conditions ID = 250A, VGS =0 VDS = 20V VDS = 20V, TC = 125C VGS = 20V VDS = VGS, ID = 250A VGS = 10V, ID = 40A VGS = 5V, ID = 40A 1 0.0039 0.0055 0.005 0.009 Min. 24 1 10 100 Typ. Max. Unit V A A nA V Table 5. Symbol gfs (1) Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Qoss(2) Qgls(3) Dynamic Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Total gate charge Gate-source charge Gate-drain charge Output charge Third-quadrant gate charge Test conditions VDS = 10V, ID = 10A Min. Typ. 30 2070 990 90 20 110 47 20 17 7.6 6.8 22.6 15 Max. Unit S pF pF pF ns ns ns ns nC nC nC nC nC VDS = 15V, f = 1MHz, VGS = 0 VDD = 12V, ID = 40A RG = 4.7 VGS = 10V (see Figure 14) VDD = 12V, ID = 80A, VGS = 5V, RG = 4.7 (see Figure 15) VDS =19V, VGS =0V VDS < 0V, VGS = 5V f=1MHz Gate DC Bias =0 Test Signal Level =20mV Open Drain RG Gate Input Resistance 1.8 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5%. 2. Qoss.= Coss * Vin, Coss = Cgd + Cgd. See Chapter 4: Appendix A 3. Gate charge for synchronous operation 4/16 STD95NH02L - STD95NH02L-1 Electrical characteristics Table 6. Symbol ISD ISDM (1) VSD (2) trr Qrr IRRM Source drain diode Parameter Source-drain current Source-drain current (pulsed) Forward on voltage ISD = 40A, VGS = 0 42 50.4 2.4 Test conditions Min. Typ. Max. 80 320 1.3 Unit A A V ns nC A Reverse recovery time ISD = 80A, di/dt = 100A/s, Reverse recovery charge VDD = 20V, Tj = 150C Reverse recovery current (see Figure 16) 1. Pulse width limited by safe operating area. 2. Pulsed: Pulse duration = 300 s, duty cycle 1.5% 5/16 Electrical characteristics STD95NH02L - STD95NH02L-1 2.1 Figure 2. Electrical characteristics (curves) Safe operating area Figure 3. Thermal impedance Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Transconductance Figure 7. Static drain-source on resistance 6/16 STD95NH02L - STD95NH02L-1 Figure 8. Gate charge vs gate-source voltage Figure 9. Electrical characteristics Capacitance variations Figure 10. Normalized gate threshold voltage vs temperature Figure 11. Normalized on resistance vs temperature Figure 12. Source-drain diode forward characteristics Figure 13. Normalized BVDSS vs temperature 7/16 Test circuit STD95NH02L - STD95NH02L-1 3 Test circuit Figure 15. Gate charge test circuit Figure 14. Switching times test circuit for resistive load Figure 16. Test circuit for inductive load Figure 17. Unclamped Inductive load test switching and diode recovery times circuit Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform 8/16 STD95NH02L - STD95NH02L-1 Appendix A 4 Appendix A Figure 20. Buck converter: power losses estimation The power losses associated with the FETs in a synchronous buck converter can be estimated using the equations shown in the table below. The formulas give a good approximation, for the sake of performance comparison, of how different pairs of devices affect the converter efficiency. However a very important parameter, the working temperature, is not considered. The real device behavior is really dependent on how the heat generated inside the devices is removed to allow for a safer working junction temperature. The low side (SW2) device requires: Very low RDS(on) to reduce conduction losses Small Qgls to reduce the gate charge losses Small Coss to reduce losses due to output capacitance Small Qrr to reduce losses on SW1 during its turn-on The Cgd/Cgs ratio lower than Vth/Vgg ratio especially with low drain to source voltage to avoid the cross conduction phenomenon; The high side (SW1) device requires: Small Rg and Ls to allow higher gate current peak and to limit the voltage feedback on the gate Small Qg to have a faster commutation and to reduce gate charge losses Low RDS(on) to reduce the conduction losses. Power losses calculation High side switching (SW1) Low side switch (SW2) Table 7. Pconduction R DS(on)SW1 * I 2 * L R DS(on)SW2 * I 2 * (1 - ) L Pswitching Vin * (Q gsth(SW1) + Q gd(SW1) ) * f * IL Ig Zero Voltage Switching 9/16 Appendix A Table 7. Power losses calculation High side switching (SW1) Recovery (1) STD95NH02L - STD95NH02L-1 Low side switch (SW2) Not applicable Vin * Q rr(SW2) * f Vf(SW2) * I L * t deadtime * f Q gls(SW2) * Vgg * f Pdiode Conductio n Not applicable Pgate(QG) Q g(SW1) * Vgg * f Vin * Q oss(SW1) * f 2 PQoss Vin * Q oss(SW2) * f 2 1. Dissipated by SW1 during turn-on Table 8. Parameters meaning Meaning Duty-cycle Post threshold gate charge Third quadrant gate charge On state losses On-off transition losses Conduction and reverse recovery diode losses Gate drive losses Output capacitance losses Parameter d Qgsth Qgls Pconduction Pswitching Pdiode Pgate PQoss 10/16 STD95NH02L - STD95NH02L-1 Package mechanical data 5 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 11/16 Package mechanical data STD95NH02L - STD95NH02L-1 DPAK MECHANICAL DATA mm. DIM. MIN. A A1 A2 B b4 C C2 D D1 E E1 e e1 H L (L1) L2 L4 R V2 2.2 0.9 0.03 0.64 5.2 0.45 0.48 6 5.1 6.4 4.7 2.28 4.4 9.35 1 2.8 0.8 0.6 0.2 0 8 0 1 0.023 0.008 8 4.6 10.1 0.173 0.368 0.039 0.110 0.031 0.039 6.6 0.252 0.185 0.090 0.181 0.397 TYP MAX. 2.4 1.1 0.23 0.9 5.4 0.6 0.6 6.2 MIN. 0.086 0.035 0.001 0.025 0.204 0.017 0.019 0.236 0.200 0.260 TYP. MAX. 0.094 0.043 0.009 0.035 0.212 0.023 0.023 0.244 inch 0068772-F 12/16 STD95NH02L - STD95NH02L-1 Package mechanical data TO-251 (IPAK) MECHANICAL DATA DIM. MIN. A A1 A3 B B2 B3 B5 B6 C C2 D E G H L L1 L2 0.45 0.48 6 6.4 4.4 15.9 9 0.8 0.8 0.3 0.95 0.6 0.6 6.2 6.6 4.6 16.3 9.4 1.2 1 0.017 0.019 0.236 0.252 0.173 0.626 0.354 0.031 0.031 2.2 0.9 0.7 0.64 5.2 mm TYP. MAX. 2.4 1.1 1.3 0.9 5.4 0.85 0.012 0.037 0.023 0.023 0.244 0.260 0.181 0.641 0.370 0.047 0.039 MIN. 0.086 0.035 0.027 0.025 0.204 inch TYP. MAX. 0.094 0.043 0.051 0.031 0.212 0.033 H C A C2 L2 D B3 B6 A1 L = = 3 B5 B A3 = B2 = G = E L1 1 2 = 0068771-E 13/16 Packing mechanical data STD95NH02L - STD95NH02L-1 6 Packing mechanical data DPAK FOOTPRINT All dimensions are in millimeters TAPE AND REEL SHIPMENT REEL MECHANICAL DATA DIM. A B C D G N T 1.5 12.8 20.2 16.4 50 22.4 18.4 13.2 mm MIN. MAX. 330 0.059 0.504 0.520 0.795 0.645 0.724 1.968 0.881 BULK QTY 2500 inch MIN. MAX. 12.992 TAPE MECHANICAL DATA DIM. A0 B0 B1 D D1 E F K0 P0 P1 P2 R W BASE QTY 2500 mm MIN. 6.8 10.4 1.5 1.5 1.65 7.4 2.55 3.9 7.9 1.9 40 15.7 16.3 inch MIN. MAX. 7 0.267 0.275 0.409 0.417 0.476 0.059 0.063 0.059 0.065 0.073 0.291 0.299 0.100 0.108 0.153 0.161 0.311 0.319 0.075 0.082 1.574 0.618 0.641 MAX. 10.6 12.1 1.6 1.85 7.6 2.75 4.1 8.1 2.1 14/16 STD95NH02L - STD95NH02L-1 Revision history 7 Revision history Table 9. Date 13-Sep-2004 27-May-2005 09-Aug-2006 02-Aug-2007 Revision history Revision 1 2 3 4 First release Some values changed in Table 5: Dynamic. The document has been updated Error on cover page; added IPAK Changes 15/16 STD95NH02L - STD95NH02L-1 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. 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